Deck 48: Design of Circuit 4 Electronic Lock

Question 1

If the INVERTERS are counted as gates, the circuit in the accompanying figure requires a connected of ____ different gates.  

A) three
B) seven
C) eight
D) eleven

Answer 1

D

Question 2

In the accompanying figure, one of the NAND gates in the 7400 IC has its inputs connected to pins #1 and #2 and its output is connected to pin #3.
 

Answer 2

True

Question 3

The connection diagram in the accompanying figure shows that one of the NAND gates in the 7400 IC has its output connected to pin #____.  

A) 3
B) 5
C) 6
D) 8

Answer 3

A

Question 4

NAND gate #2 in the accompanying figure has its output labeled #____.  

A) 2
B) 4
C) 6
D) 8

Question 5

In the circuit in the accompanying figure, the input of a block is provided by ____.  

A) an internal device
B) ground
C) the output of the block preceding it
D) the input of the block preceding it

Question 6

In the accompanying figure, the AND gate #2 cannot have a high output unless AND gate #1 provides a high to its A input.
 

Question 7

In the accompanying figure, the AND gate #3 can have a high output unless AND gate #2 provides a high for its A input.
 

Question 8

The 7400N in the accompanying figure is a four binary-input NAND gate.
 

Question 9

The connection diagram in the accompanying figure shows the second gate in the 7400 IC has its inputs connected to ____.  

A) pins #1 and #5
B) pins #4 and #5
C) pins #3 and #4
D) pins #4 and #7

Question 10

Connection in a circuit becomes much simpler if the schematic is first labeled with the proper IC pin numbers.