Deck 5: Computer Systems Organization
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Deck 5: Computer Systems Organization
1
Machine language instructions can be decoded and executed by the control unit of a computer.
True
2
The RAM of a computer provides volatile storage.
True
3
Both RAM and ROM are memory chips into which information has been pre-recorded during manufacture.
False
4
Examples of nonvolatile storage are mass storage devices such as disks and tapes.
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5
The normal mode of operation of a Von Neumann machine is sequential.
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6
Registers can be accessed much more quickly than random access memory.
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7
In a direct access storage device, every unit of information has a unique address.
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8
In a two-level memory hierarchy, when the computer needs a piece of information, it looks in RAM first, then cache memory.
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9
The set of all operations that can be executed by a processor is called its I/O set.
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10
In the MIMD parallel processing model, there is a single program whose instructions are fetched/decoded/executed in a sequential manner by one control unit.
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11
The time it takes to fetch or store a cell is the same for all the cells in random access memory.
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12
The branch of computer science that studies computers in terms of their major functional units and how they work is known as computer organization.
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13
As computers become faster, memory access speeds are keeping pace.
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14
Each processor/memory pair in the MIMD parallel processing model executes its own program in its own local memory at its own rate.
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15
The three parts of the ALU are together called the processor.
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16
The Memory Data Register holds the address of the cell to be fetched or stored.
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17
The principle of locality states that when the computer uses something, it will probably use it again very soon.
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18
The sectors of a disk are placed in concentric circles called cells.
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19
Memory locations are stored in row major order.
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20
Computer manufacturers use a standard cell size of 8 bytes.
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21
System software is an intermediary between the assembly language and hardware components of the Von Neumann machine.
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22
Machines that use the simplified approach to designing instruction sets are known as RISC machines.
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23
The Von Neumann bottleneck is the phenomenon where sequential one-instruction-at-a-time computer models cannot handle large-scale problems.
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24
The ____ holds the address of the next instruction to be executed.
A) status register
B) program counter
C) condition register
D) instruction register
A) status register
B) program counter
C) condition register
D) instruction register
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25
The ____ are the devices that allow a computer system to communicate and interact with the outside world as well as store information.
A) registers
B) arithmetic/logic units
C) control units
D) input/output units
A) registers
B) arithmetic/logic units
C) control units
D) input/output units
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26
To understand how computers process information, we must study computers as collections of ____ that perform tasks such as information processing, information storage, computation, and data transfer functional units.
A) data types
B) functional units
C) hardware
D) memory units
A) data types
B) functional units
C) hardware
D) memory units
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27
A(n) ____ handles the details of input/output and compensates for any speed differences between I/O devices and other parts of the computer.
A) cache
B) I/O register
C) decoder circuit
D) I/O controller
A) cache
B) I/O register
C) decoder circuit
D) I/O controller
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28
The ____ of a disk is the time needed to position the read/write head over the correct track.
A) latency
B) frequency
C) transfer speed
D) seek time
A) latency
B) frequency
C) transfer speed
D) seek time
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29
If a computer has a maximum of 2N memory cells, then each address field in a machine language instruction must be ____ bits wide to enable us to address every cell.
A) N
B) 2N
C) N2
D) 2N
A) N
B) 2N
C) N2
D) 2N
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30
The ____ of a disk is the time for the beginning of the desired sector to rotate under the read/write head.
A) latency
B) transfer time
C) frequency
D) seek time
A) latency
B) transfer time
C) frequency
D) seek time
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31
How many bytes are in a gigabyte?
A) 210
B) 220
C) 230
D) 2100
A) 210
B) 220
C) 230
D) 2100
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32
What are the four major components of the Von Neumann architecture?
A) input unit, output unit, central processing unit, memory
B) random access memory, data registers, cache memory, nonvolatile storage
C) central processing unit, arithmetic logic unit, control unit, input/output
D) memory, input/output, arithmetic logic unit, control unit
A) input unit, output unit, central processing unit, memory
B) random access memory, data registers, cache memory, nonvolatile storage
C) central processing unit, arithmetic logic unit, control unit, input/output
D) memory, input/output, arithmetic logic unit, control unit
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33
Machine programming languages were designed to make programming less cumbersome, confusing, and error prone.
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34
The ____ of a disk is the time for the entire sector to pass under the read/write head and have its contents read into or written from memory.
A) latency
B) transfer time
C) frequency
D) seek time
A) latency
B) transfer time
C) frequency
D) seek time
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35
Parallel processing enables researchers to easily and transparently access computer facilities without regard for their locations.
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36
The acronym ____ is frequently used to refer to the memory unit of a computer.
A) ROM
B) CD
C) MDR
D) RAM
A) ROM
B) CD
C) MDR
D) RAM
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37
A(n) ____ is a high-speed memory unit.
A) MIMD
B) I/O controller
C) decoder
D) cache
A) MIMD
B) I/O controller
C) decoder
D) cache
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38
The ____ machine language instructions alter the normal sequential flow of control.
A) data transfer
B) arithmetic
C) branch
D) compare
A) data transfer
B) arithmetic
C) branch
D) compare
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39
It is the task of the ____ to fetch, decode, and execute instructions.
A) arithmetic/logic unit (ALU)
B) I/O controllers
C) memory
D) control unit
A) arithmetic/logic unit (ALU)
B) I/O controllers
C) memory
D) control unit
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40
A(n) ____ is a storage cell that holds the operands of an arithmetic operation and that, when the operation is complete, holds its result.
A) decoder
B) register
C) I/O controller
D) cache
A) decoder
B) register
C) I/O controller
D) cache
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41
The ____ holds a copy of the instruction fetched from memory
A) program counter
B) instruction register
C) cache register
D) instruction decoder
A) program counter
B) instruction register
C) cache register
D) instruction decoder
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42
The ____ operation in Von Neumann machines uses a special set of bits known as condition codes to represent the result of the operation.
A) compare
B) addition
C) control
D) looping
A) compare
B) addition
C) control
D) looping
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43
In a parallel processing model, the control unit ____ instructions to every ALU.
A) broadcasts
B) decodes
C) stores
D) encodes
A) broadcasts
B) decodes
C) stores
D) encodes
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44
During the ____ phase, the control unit circuitry generates the necessary sequence of control signals and data transfer signals to the other units of the computer to carry out the instruction.
A) fetch
B) execution
C) store
D) decode
A) fetch
B) execution
C) store
D) decode
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45
A(n) ____ is used to represent the instructions that can be decoded and executed by the control unit of a computer.
A) intermediate language
B) machine language
C) compiler
D) ASCII code
A) intermediate language
B) machine language
C) compiler
D) ASCII code
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46
To alert the computer that an input/output operation is done, a(n) ____ is transmitted to the processor.
A) condition code
B) interrupt signal
C) broadcast
D) execution instruction
A) condition code
B) interrupt signal
C) broadcast
D) execution instruction
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47
To solve the difficulty of scaling memory organization, memories are physically stored into ____ dimensional organization.
A) one
B) two
C) three
D) multi
A) one
B) two
C) three
D) multi
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48
Why would a computer engineer choose to use CISC?
A) it is inexpensive
B) it is easy to use
C) it has better security features
D) it directly provides features needed
A) it is inexpensive
B) it is easy to use
C) it has better security features
D) it directly provides features needed
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49
Why aren't computer memories built completely out of cache memory?
A) cache is too expensive
B) other types of memory are faster
C) cache is not scalable
D) cache is not reliable enough
A) cache is too expensive
B) other types of memory are faster
C) cache is not scalable
D) cache is not reliable enough
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50
In a ____, the original contents of the memory cell are unchanged.
A) nondestructive fetch
B) destructive store
C) random access memory
D) volatile storage
A) nondestructive fetch
B) destructive store
C) random access memory
D) volatile storage
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