Deck 1: Digital Circuit Design and RTL Implementation
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Deck 1: Digital Circuit Design and RTL Implementation
1
Any signed negative binary number is recognised by its
A)msb
B)lsb
C)byte
D)nibble
A)msb
B)lsb
C)byte
D)nibble
msb
2
The parameter through which 16 distinct values can be represented is known as
A)bit
B)byte
C)word
D)nibble
A)bit
B)byte
C)word
D)nibble
word
3
The representation of octal number (532.2)8 in decimal is
A)(346.25)10
B)(532.864)10
C)(340.67)10
D)(531.668)10
A)(346.25)10
B)(532.864)10
C)(340.67)10
D)(531.668)10
(346.25)10
4
The decimal equivalent of the binary number (1011.011)2 is
A)(11.375)10
B)(10.123)10
C)(11.175)10
D)(9.23)10
A)(11.375)10
B)(10.123)10
C)(11.175)10
D)(9.23)10
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5
An important drawback of binary system is
A)it requires very large string of 1's and 0's to represent a decimal number
B)it requires sparingly small string of 1's and 0's to represent a decimal number
C)it requires large string of 1's and small string of 0's to represent a decimal number
D)it requires small string of 1's and large string of 0's to represent a decimal number
A)it requires very large string of 1's and 0's to represent a decimal number
B)it requires sparingly small string of 1's and 0's to represent a decimal number
C)it requires large string of 1's and small string of 0's to represent a decimal number
D)it requires small string of 1's and large string of 0's to represent a decimal number
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6
The decimal equivalent of the octal number (645)8 is
A)(450)10
B)(451)10
C)(421)10
D)(501)10
A)(450)10
B)(451)10
C)(421)10
D)(501)10
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7
The largest two digit hexadecimal number is
A)(fe)16
B)(fd)16
C)(ff)16
D)(ef)16
A)(fe)16
B)(fd)16
C)(ff)16
D)(ef)16
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8
Representation of hexadecimal number (6DE)H in decimal:
A)6 * 162 + 13 * 161 + 14 * 160
B)6 * 162 + 12 * 161 + 13 * 160
C)6 * 162 + 11 * 161 + 14 * 160
D)6 * 162 + 14 * 161 + 15 * 160
A)6 * 162 + 13 * 161 + 14 * 160
B)6 * 162 + 12 * 161 + 13 * 160
C)6 * 162 + 11 * 161 + 14 * 160
D)6 * 162 + 14 * 161 + 15 * 160
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9
The quantity of double word is
A)16 bits
B)32 bits
C)4 bits
D)8 bits
A)16 bits
B)32 bits
C)4 bits
D)8 bits
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10
What does RTL in digital circuit design stand for?
A)register transfer language
B)register transfer logic
C)register transfer level
D)resistor-transistor logic
A)register transfer language
B)register transfer logic
C)register transfer level
D)resistor-transistor logic
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11
RTL is a design abstraction of what kind of circuit?
A)asynchronous digital circuit
B)synchronous digital circuit
C)asynchronous sequential circuit
D)analog circuit
A)asynchronous digital circuit
B)synchronous digital circuit
C)asynchronous sequential circuit
D)analog circuit
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12
RTL is used in HDL to create what level of representations in the circuit?
A)high-level
B)low-level
C)mid-level
D)same level
A)high-level
B)low-level
C)mid-level
D)same level
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13
RTL mainly focuses on describing the flow of signals between
A)logic gates
B)registers
C)clock
D)inverter
A)logic gates
B)registers
C)clock
D)inverter
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14
Which flip-flop is usually used in the implementation of the registers?
A)d flip-flop
B)s-r flip-flop
C)t flip-flop
D)j-k flip-flop
A)d flip-flop
B)s-r flip-flop
C)t flip-flop
D)j-k flip-flop
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15
Which of the following tool performs logic optimization?
A)simulation tool
B)synthesis tool
C)routing tool
D)rtl compiler
A)simulation tool
B)synthesis tool
C)routing tool
D)rtl compiler
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16
Hold time is the time needed for the data to after the edge of the clock is triggered.
A)decrease
B)increase
C)remain constant
D)negate
A)decrease
B)increase
C)remain constant
D)negate
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17
Simulator enters in which phase after the initialization phase?
A)execution phase
B)compilation phase
C)elaboration phase
D)simulation phase
A)execution phase
B)compilation phase
C)elaboration phase
D)simulation phase
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18
All input of NOR as low produces result as
A)low
B)mid
C)high
D)floating
A)low
B)mid
C)high
D)floating
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19
In RTL NOR gate, the output is at logic 1 only when all the inputs are at
A)logic 0
B)logic 1
C)+10v
D)floating
A)logic 0
B)logic 1
C)+10v
D)floating
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20
The role of the is to convert the collector current into a voltage in RTL.
A)collector resistor
B)base resistor
C)capacitor
D)inductor
A)collector resistor
B)base resistor
C)capacitor
D)inductor
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21
The limitations of the one transistor RTL NOR gate are overcome by
A)two-transistor rtl implementation
B)three-transistor rtl implementation
C)multi-transistor rtl implementation
D)four-transistor rtl implementation
A)two-transistor rtl implementation
B)three-transistor rtl implementation
C)multi-transistor rtl implementation
D)four-transistor rtl implementation
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22
The primary advantage of RTL technology was that
A)it results as low power dissipation
B)it uses a minimum number of resistors
C)it uses a minimum number of transistors
D)it operates swiftly
A)it results as low power dissipation
B)it uses a minimum number of resistors
C)it uses a minimum number of transistors
D)it operates swiftly
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23
The disadvantage of RTL is that
A)it uses a maximum number of resistors
B)it results in high power dissipation
C)high noise creation
D)it uses minimum number of transistors
A)it uses a maximum number of resistors
B)it results in high power dissipation
C)high noise creation
D)it uses minimum number of transistors
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24
TTL circuits with "totem-pole" output stage minimize
A)the power dissipation in rtl
B)the time consumption in rtl
C)the speed of transferring rate in rtl
D)propagation delay in rtl
A)the power dissipation in rtl
B)the time consumption in rtl
C)the speed of transferring rate in rtl
D)propagation delay in rtl
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25
The minimum number of transistors can be used by 2 input AND gate is
A)2
B)3
C)4
D)5
A)2
B)3
C)4
D)5
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