Deck 10: Counters and Shift Registers

Question 1

UP-DOWN counter is also known as                        

A)dual counter
B)multi counter
C)multimode counter
D)two counter

Answer 1

multimode counter

Question 2

In an UP-counter, each flip-flop is triggered by                        

A)the output of the next flip-flop
B)the normal output of the preceding flip-flop
C)the clock pulse of the previous flip-flop
D)the inverted output of the preceding flip-flop

Answer 2

the normal output of the preceding flip-flop

Question 3

In DOWN-counter, each flip-flop is triggered by                        

A)the output of the next flip-flop
B)the normal output of the preceding flip-flop
C)the clock pulse of the previous flip-flop
D)the inverted output of the preceding flip-flop

Answer 3

the inverted output of the preceding flip-flop

Question 4

Binary counter that count incrementally and decrement is called                        

A)up-down counter
B)lsi counters
C)down counter
D)up counter

Question 5

Once an up-/down-counter begins its count sequence, it                        

A)starts counting
B)can be reversed
C)can't be reversed
D)can be altered

Question 6

In 4-bit up-down counter, how many flip-flops are required?

A)2
B)3
C)4
D)5

Question 7

A modulus-10 counter must have _

A)10 flip-flops
B)4 flip-flops
C)2 flip-flops
D)synchronous clocking

Question 8

Which is not an example of a truncated modulus?

A)8
B)9
C)11
D)15

Question 9

The designation means that the                  

A)up count is active-high, the down count is active-low
B)up count is active-low, the down count is active-high
C)up and down counts are both active-low
D)up and down counts are both active-high

Question 10

The full form of SIPO is                        

A)serial-in parallel-out
B)parallel-in serial-out
C)serial-in serial-out
D)serial-in peripheral-out

Question 11

How can parallel data be taken out of a shift register simultaneously?

A)use the q output of the first ff
B)use the q output of the last ff
C)tie all of the q outputs together
D)use the q output of each ff

Question 12

What is meant by parallel load of a shift register?

A)all ffs are preset with data
B)each ff is loaded with data, one at a time
C)parallel shifting of data
D)all ffs are set with data

Question 13

After three clock pulses, the register contains                  

A)01110
B)00001
C)00101
D)00110

Question 14

What will be the 4-bit pattern after the second clock pulse? (Right-most bit first)

A)1100
B)0011
C)0000
D)1111

Question 15

In digital logic, a counter is a device which                          

A)counts the number of outputs
B)stores the number of times a particular event or process has occurred
C)stores the number of times a clock pulse rises and falls
D)counts the number of inputs

Question 16

A counter circuit is usually constructed of                          

A)a number of latches connected in cascade form
B)a number of nand gates connected in cascade form
C)a number of flip-flops connected in cascade
D)a number of nor gates connected in cascade form

Question 17

How many types of the counter are there?

A)2
B)3
C)4
D)5

Question 18

A decimal counter has states.

A)5
B)10
C)15
D)20

Question 19

Ripple counters are also called                          

A)ssi counters
B)asynchronous counters
C)synchronous counters
D)vlsi counters

Question 20

Synchronous counter is a type of                          

A)ssi counters
B)lsi counters
C)msi counters
D)vlsi counters

Question 21

Three decade counter would have                          

A)2 bcd counters
B)3 bcd counters
C)4 bcd counters
D)5 bcd counters

Question 22

BCD counter is also known as                          

A)parallel counter
B)decade counter
C)synchronous counter
D)vlsi counter

Question 23

The parallel outputs of a counter circuit represent the                            

A)parallel data word
B)clock frequency
C)counter modulus
D)clock count

Question 24

The time from the beginning of a read cycle to the end of tACS/tAA is called as

A)write enable time
B)data hold
C)read cycle time
D)access time

Question 25

Why did PROM introduced?

A)to increase the storage capacity
B)to increase the address locations
C)to provide flexibility
D)to reduce the size