Deck 7: Digital Circuits and HDL Applications
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Deck 7: Digital Circuits and HDL Applications
1
How many NOT gates are required for the construction of a 4-to-1 multiplexer?
A)3
B)4
C)2
D)5
A)3
B)4
C)2
D)5
2
2
In the given 4-to-1 multiplexer, if c1 = 0 and c0 = 1 then the output M is______________
A)x0
B)x1
C)x2
D)x3

A)x0
B)x1
C)x2
D)x3
x1
3
The enable input is also known as______________
A)select input
B)decoded input
C)strobe
D)sink
A)select input
B)decoded input
C)strobe
D)sink
strobe
4
The full form of HDL is______________
A)higher descriptive language
B)higher definition language
C)hardware description language
D)high descriptive language
A)higher descriptive language
B)higher definition language
C)hardware description language
D)high descriptive language
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5
The full form of VHDL is______________
A)very high descriptive language
B)verilog hardware description language
C)variable definition language
D)none of the mentioned
A)very high descriptive language
B)verilog hardware description language
C)variable definition language
D)none of the mentioned
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6
VHSIC stands for______________
A)very high speed integrated circuits
B)very higher speed integration circuits
C)variable high speed integrated circuits
D)variable higher speed integration circuits
A)very high speed integrated circuits
B)very higher speed integration circuits
C)variable high speed integrated circuits
D)variable higher speed integration circuits
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7
VHDL is being used for______________
A)documentation
B)verification
C)synthesis of large digital design
D)all of the mentioned
A)documentation
B)verification
C)synthesis of large digital design
D)all of the mentioned
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8
The use of VHDL can be done in____________ways.
A)2
B)3
C)4
D)5
A)2
B)3
C)4
D)5
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9
At high frequencies when the sampling interval is too long in a frequency counter______________
A)the counter works fine
B)the counter undercounts the frequency
C)the measurement is less precise
D)the counter overflows
A)the counter works fine
B)the counter undercounts the frequency
C)the measurement is less precise
D)the counter overflows
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10
The output frequency related to the sampling interval of a frequency counter as______________
A)directly with the sampling interval
B)inversely with the sampling interval
C)more precision with longer sampling interval
D)less precision with longer sampling interval
A)directly with the sampling interval
B)inversely with the sampling interval
C)more precision with longer sampling interval
D)less precision with longer sampling interval
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11
In an HDL application of a stepper motor, what is done next after an up/down counter is built?
A)build the sequencer
B)test it on a simulator
C)test the decoder
D)design an intermediate integer variable
A)build the sequencer
B)test it on a simulator
C)test the decoder
D)design an intermediate integer variable
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12
In a digital clock application, the basic frequency must be divided down as______________
A)1 hz
B)60 hz
C)100 hz
D)1000 hz
A)1 hz
B)60 hz
C)100 hz
D)1000 hz
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13
What does the data signal do in the keypad application?
A)the row and column encoded data
B)the ring encoded data
C)the freeze locator data
D)the ring counter data
A)the row and column encoded data
B)the ring encoded data
C)the freeze locator data
D)the ring counter data
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14
When a key is pressed, what does the ring counter in the HDL keypad application do?
A)count to find the row
B)freeze
C)count to find the column
D)start the d flip-flop
A)count to find the row
B)freeze
C)count to find the column
D)start the d flip-flop
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15
A step which should be followed in project management is known as______________
A)overall definition
B)system documentation
C)synthesis and testing
D)system integration
A)overall definition
B)system documentation
C)synthesis and testing
D)system integration
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16
In the keypad application, the preset state of the ring counter define______________
A)the nanding of the columns
B)the nanding of the rows
C)the proper output of the column encoder
D)the proper output of the row encoder
A)the nanding of the columns
B)the nanding of the rows
C)the proper output of the column encoder
D)the proper output of the row encoder
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17
A major block which is not a part of an HDL frequency counter______________
A)timing and control unit
B)decoder/display
C)display register
D)bit shifter
A)timing and control unit
B)decoder/display
C)display register
D)bit shifter
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18
A stepper motor HDL application must include
A)sequencers and multiplexers
B)types and bits
C)counters and decoders
D)variables and processes
A)sequencers and multiplexers
B)types and bits
C)counters and decoders
D)variables and processes
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19
Which of the following is a not a characteristics of combinational circuits?
A)the output of combinational circuit depends on present input
B)there is no use of clock signal in combinational circuits
C)the output of combinational circuit depends on previous output
D)there is no storage element in combinational circuit
A)the output of combinational circuit depends on present input
B)there is no use of clock signal in combinational circuits
C)the output of combinational circuit depends on previous output
D)there is no storage element in combinational circuit
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20
Which of the following is not a combinational circuit?
A)adder
B)code convertor
C)multiplexer
D)counter
A)adder
B)code convertor
C)multiplexer
D)counter
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21
In a given combinational circuit, the concurrent statements are used with selected assignments using WHEN and ELSE keyword. What is the other alternative to implement the same?
A)with-select
B)with-select-when
C)if-else
D)case
A)with-select
B)with-select-when
C)if-else
D)case
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22
For using a process to implement a combinational circuit, which signals should be in the sensitivity list?
A)inputs of the circuit
B)outputs of the circuit
C)both of the inputs and outputs
D)no signal should be in the sensitivity list
A)inputs of the circuit
B)outputs of the circuit
C)both of the inputs and outputs
D)no signal should be in the sensitivity list
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23
A 4 to 16 decoder can be used as a code converter. What will be the inputs and outputs of the converter respectively?
A)binary, octal
B)octal, binary
C)hexadecimal, binary
D)binary, hexadecimal
A)binary, octal
B)octal, binary
C)hexadecimal, binary
D)binary, hexadecimal
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24
Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
A)low input voltages
B)synchronous operation
C)gate impedance
D)cross coupling
A)low input voltages
B)synchronous operation
C)gate impedance
D)cross coupling
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