Deck 1: Understanding Cuda Kernel Code and Host GPU Interactions
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Deck 1: Understanding Cuda Kernel Code and Host GPU Interactions
1
The kernel code is dentified by the ________qualifier with void return type
A)_host_
B)__global__
C)_device_
D)void
A)_host_
B)__global__
C)_device_
D)void
__global__
2
The kernel code is only callable by the host
True
3
The kernel code is executable on the device and host
False
4
Calling a kernel is typically referred to as _________.
A)kernel thread
B)kernel initialization
C)kernel termination
D)kernel invocation
A)kernel thread
B)kernel initialization
C)kernel termination
D)kernel invocation
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5
Host codes in a CUDA application can Initialize a device
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6
Host codes in a CUDA application can Allocate GPU memory
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7
Host codes in a CUDA application can not Invoke kernels
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8
CUDA offers the Chevron Syntax to configure and execute a kernel.
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9
the BlockPerGrid and ThreadPerBlock parameters are related to the ________ model supported by CUDA.
A)host
B)kernel
C)threadabstraction
D)none of above
A)host
B)kernel
C)threadabstraction
D)none of above
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10
_________ is Callable from the device only
A)_host_
B)__global__
C)_device_
D)none of above
A)_host_
B)__global__
C)_device_
D)none of above
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11
______ is Callable from the host
A)_host_
B)__global__
C)_device_
D)none of above
A)_host_
B)__global__
C)_device_
D)none of above
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12
______ is Callable from the host
A)_host_
B)__global__
C)_device_
D)none of above
A)_host_
B)__global__
C)_device_
D)none of above
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13
CUDA supports ____________ in which code in a single thread is executed by all other threads.
A)tread division
B)tread termination
C)thread abstraction
D)none of above
A)tread division
B)tread termination
C)thread abstraction
D)none of above
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14
In CUDA, a single invoked kernel is referred to as a _____.
A)block
B)tread
C)grid
D)none of above
A)block
B)tread
C)grid
D)none of above
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15
A grid is comprised of ________ of threads.
A)block
B)bunch
C)host
D)none of above
A)block
B)bunch
C)host
D)none of above
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16
A block is comprised of multiple _______.
A)treads
B)bunch
C)host
D)none of above
A)treads
B)bunch
C)host
D)none of above
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17
a solution of the problem in representing the parallelismin algorithm is
A)cud
B)pta
C)cda
D)cuda
A)cud
B)pta
C)cda
D)cuda
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18
Host codes in a CUDA application can not Reset a device
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19
Host codes in a CUDA application can Transfer data to and from the device
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20
Host codes in a CUDA application can not Deallocate memory on the GPU
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21
Any condition that causes a processor to stall is called as _____.
A)hazard
B)page fault
C)system error
D)none of the above
A)hazard
B)page fault
C)system error
D)none of the above
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22
The time lost due to branch instruction is often referred to as _____.
A)latency
B)delay
C)branch penalty
D)none of the above
A)latency
B)delay
C)branch penalty
D)none of the above
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23
_____ method is used in centralized systems to perform out of order execution.
A)scorecard
B)score boarding
C)optimizing
D)redundancy
A)scorecard
B)score boarding
C)optimizing
D)redundancy
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24
The computer cluster architecture emerged as an alternative for ____.
A)isa
B)workstation
C)super computers
D)distributed systems
A)isa
B)workstation
C)super computers
D)distributed systems
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