Deck 10: Programmable Logic
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Deck 10: Programmable Logic
1
Programmable Logic Devices (PLDs) cannot be programmed by the user.
False
2
One advantage of PLDs over fixed- function logic devices is that many more logic circuits can be packaged in a much smaller area.
True
3
SLPDs are the more complex form of PLDs.
False
4
A PAL has a programmable AND array and a programmable OR array.
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5
A PLA has a higher propagation delay time than a PAL because the signal must traverse two programmable arrays.
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6
The main difference between a GAL and a PAL is that the GAL is reprogrammable.
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7
When a PAL is programmed, small fuses are blown open to allow connections between the input pins and the AND array.
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8
Input pins on PALs are buffered to allow both polarities of the input signal to be available to the array.
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9
A PAL can only be used for combinational logic.
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10
There is a limit to the number of product terms that can be assigned to each PAL output pin.
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11
A PAL16H8 has 16 active high output pins.
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12
The GAL consists of a reprogrammable array of AND gates that connects to a fixed array of OR gates.
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13
The typical EECMOS cell in a GAL will retain its programmed state for 5 to 10 years.
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14
The software packages for SPLD programming are called Logic Compilers.
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15
All SPLD software and programmers (regardless of the manufacturer) utilize JEDEC files that conform to established standards.
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16
An eight- wire JTAG compliant interface cable connects the computer running HDL software to the SPLD already installed on a system circuit board.
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17
The file required to program a PAL is called a JEDEC file.
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18
An FPGA (Field Programmable Gate Array) basically consists of an array of logic blocks with programmable row and column interconnecting channels surrounded by programmable I/O blocks.
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19
A typical FPGA logic element contains a 2- input LUT.
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20
A LUT can be programmed to perform logic functions.
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21
Which Boolean Expressions are implemented by a PAL?
A) Sum- of- Product
B) DeMorgan
C) Product- of- Sum
D) Both A and C
A) Sum- of- Product
B) DeMorgan
C) Product- of- Sum
D) Both A and C
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22
Why are the input variables to a PAL buffered?
A) To prevent loading by a large number of AND gate inputs
B) To protect the inputs during programming of the PAL
C) To allow the input to be enabled
D) To prevent power drain when the inputs are not changing
A) To prevent loading by a large number of AND gate inputs
B) To protect the inputs during programming of the PAL
C) To allow the input to be enabled
D) To prevent power drain when the inputs are not changing
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23
The part number PAL16H8 defines ________.
A) a PAL with 16 product matrix inputs and 8 active high, latched outputs
B) a PLA with 16 matrix active high inputs and 8 outputs
C) a PAL with 8 inputs and 16 active high outputs
D) a PAL with 16 product matrix inputs and 8 active high outputs
A) a PAL with 16 product matrix inputs and 8 active high, latched outputs
B) a PLA with 16 matrix active high inputs and 8 outputs
C) a PAL with 8 inputs and 16 active high outputs
D) a PAL with 16 product matrix inputs and 8 active high outputs
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24
An OLMC is an _________.
A) output logic microcomputer
B) output logic macrocell
C) optical logic main communicator
D) onboard logic management controller
A) output logic microcomputer
B) output logic macrocell
C) optical logic main communicator
D) onboard logic management controller
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25
A GAL16V8 has ________.
A) 16 outputs and 8 variable inputs
B) 16 outputs and 8 inputs
C) 16 inputs and 8 inputs or outputs
D) 16 inputs and 8 variable outputs
A) 16 outputs and 8 variable inputs
B) 16 outputs and 8 inputs
C) 16 inputs and 8 inputs or outputs
D) 16 inputs and 8 variable outputs
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26
The main difference between a PAL and a GAL is _________.
A) a PAL is designed for S0P equations while a GAL is designed for P0S
B) a GAL uses EECMOS technology and is re- programmable
C) a GAL has a programmable AND and OR matrix
D) a GAL can implement more complicated expressions than a PAL because it has more product terms
A) a PAL is designed for S0P equations while a GAL is designed for P0S
B) a GAL uses EECMOS technology and is re- programmable
C) a GAL has a programmable AND and OR matrix
D) a GAL can implement more complicated expressions than a PAL because it has more product terms
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27
The main advantage of the V configuration such as a GAL22V10 is ________.
A) the output pins can be bi- directional
B) the outputs can be configured as active high or active low
C) the outputs can be configured as combinational or registered
D) all of the above
A) the output pins can be bi- directional
B) the outputs can be configured as active high or active low
C) the outputs can be configured as combinational or registered
D) all of the above
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28
The output logic macrocell in a GAL16V8 is _________.
A) not used since the output pins are fixed
B) internal to the GAL and can not be controlled
C) only available when a pin is declared bi- directional
D) the circuitry which allows the outputs to be configured as combinational or registered
A) not used since the output pins are fixed
B) internal to the GAL and can not be controlled
C) only available when a pin is declared bi- directional
D) the circuitry which allows the outputs to be configured as combinational or registered
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29
When tri- state outputs are used in a GAL22V10, _________.
A) multiple product terms can be used to control the output
B) all outputs must be controlled with the same control input
C) only one product term can be used to control the output
D) a single pin must be used for all tri- state control
A) multiple product terms can be used to control the output
B) all outputs must be controlled with the same control input
C) only one product term can be used to control the output
D) a single pin must be used for all tri- state control
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30
For a GAL22V10, if the output from one pin is internally fed back to the input of another OLMC then the propagation time of the second pin would _________.
A) decrease
B) increase
C) be unchanged
D) cannot predict
A) decrease
B) increase
C) be unchanged
D) cannot predict
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