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book Systems Architecture 6th Edition by Stephen Burd cover

Systems Architecture 6th Edition by Stephen Burd

Edition 6ISBN: 978-0538475334
book Systems Architecture 6th Edition by Stephen Burd cover

Systems Architecture 6th Edition by Stephen Burd

Edition 6ISBN: 978-0538475334
Exercise 3
Processor R is a 64-bit RISC processor with a 2 GHz clock rate. The average instruction requires one cycle to complete, assuming zero wait state memory accesses. Processor C is a CISC processor with a 1.8 GHz clock rate. The average simple instruction requires one cycle to complete, assuming zero wait state memory accesses. The average complex instruction requires two cycles to complete, assuming zero wait state memory accesses. Processor R can t directly implement the complex processing instructions of Processor C. Executing an equivalent set of simple instructions requires an average of three cycles to complete, assuming zero wait state memory accesses. Program S contains nothing but simple instructions. Program C executes 70% simple instructions and 30% complex instructions. Which processor will execute program S more quickly? Which processor will execute program C more quickly? At what percentage of complex instructions will the performance of the two processors be equal?
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RISC Processor
• Processor R is a 64-bi...

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Systems Architecture 6th Edition by Stephen Burd
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