Deck 7: BJT Power Amplifiers

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Question
<strong>  Figure 1 Refer to Figure 1. The voltage gain, Av, to the load is approximately</strong> A)11 B)7.5 C)5.4 D)2.0 <div style=padding-top: 35px> Figure 1
Refer to Figure 1. The voltage gain, Av, to the load is approximately

A)11
B)7.5
C)5.4
D)2.0
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Question
The amplifier type that frequently has a resonant circuit load is

A)class- AB
B)class- C
C)class- B
D)class- A
Question
The amplifier type that has the worst efficiency is

A)class- B
B)class- A
C)class- C
D)class- AB
Question
In a single- stage class- A amplifier, the quiescent current is the same as the

A)ac load current
B)dc collector current
C)ac collector current
D)bias current
Question
<strong>  Figure 7 Refer to Figure 7. The expected dc emitter voltage for Q1 is</strong> A)0 V B)9.0 V C)0.7 V D)8.3 V <div style=padding-top: 35px> Figure 7
Refer to Figure 7. The expected dc emitter voltage for Q1 is

A)0 V
B)9.0 V
C)0.7 V
D)8.3 V
Question
A heat sink is used to

A)prevent excessive current
B)reduce the junction temperature
C)reduce ambient temperature
D)all of the above
Question
<strong>  Figure 2 This is modification of Figure 1 (added Q<sub>2</sub>, Q<sub>3</sub>, and R<sub>L</sub>, deletion of C<sub>3 </sub>and a changed value of R<sub>E1</sub>). Refer to Figure 2. With no applied signal, the dc power dissipated in the load is approximately</strong> A)1.1 W B)0 C)5.5 W D)2.8 W <div style=padding-top: 35px> Figure 2 This is modification of Figure 1 (added Q2, Q3, and RL, deletion of C3 and a changed value of RE1).
Refer to Figure 2. With no applied signal, the dc power dissipated in the load is approximately

A)1.1 W
B)0
C)5.5 W
D)2.8 W
Question
<strong>  Figure 3 Refer to Figure 3. Note the input is a 5 Vrms sine wave. The ac power in RL is ideally</strong> A)1.56 W B)3.12 W C)0.31 W D)0.62 W <div style=padding-top: 35px> Figure 3
Refer to Figure 3. Note the input is a 5 Vrms sine wave. The ac power in RL is ideally

A)1.56 W
B)3.12 W
C)0.31 W
D)0.62 W
Question
A class- A amplifier has an input resistance of 520 ▲ and a load resistance of 26 ▲. Assume a 1 Vrms input produces a 5 Vrms output The power gain is

A)5
B)100
C)50
D)500
Question
<strong>  Figure 2 This is modification of Figure 1 (added Q<sub>2</sub>, Q<sub>3</sub>, and R<sub>L</sub>, deletion of C<sub>3 </sub>and a changed value of R<sub>E1</sub>). Refer to Figure 2. If Vin = 1 Vrms, the ac power in RL is approximately</strong> A)2.6 W B)4.0 W C)680 mW D)1.3 W <div style=padding-top: 35px> Figure 2 This is modification of Figure 1 (added Q2, Q3, and RL, deletion of C3 and a changed value of RE1).
Refer to Figure 2. If Vin = 1 Vrms, the ac power in RL is approximately

A)2.6 W
B)4.0 W
C)680 mW
D)1.3 W
Question
<strong>  Figure 1 Refer to Figure 1. The input impedance is approximately</strong> A)230 ▲ B)186 ▲ C)125 ▲ D)142 ▲ <div style=padding-top: 35px> Figure 1
Refer to Figure 1. The input impedance is approximately

A)230 ▲
B)186 ▲
C)125 ▲
D)142 ▲
Question
<strong>  Figure 3 Refer to Figure 3. The value of dc bias current in R1 is</strong> A)43 mA B)90 mA C)86 mA D)48 mA <div style=padding-top: 35px> Figure 3
Refer to Figure 3. The value of dc bias current in R1 is

A)43 mA
B)90 mA
C)86 mA
D)48 mA
Question
<strong>  Figure 3 Refer to Figure 3. With no signal in, IC(Q1)is ideally</strong> A)0 B)86 mA C)43 mA D)48 mA <div style=padding-top: 35px> Figure 3
Refer to Figure 3. With no signal in, IC(Q1)is ideally

A)0
B)86 mA
C)43 mA
D)48 mA
Question
Assume the Q point on a class- A amplifier is centered on the ac load line. The maximum peak- to- peak output voltage is

A)1/2 VCEQ
B)2 VCEQ
C)1/2 VCC
D)VCEQ
Question
<strong>  Figure 5 Refer to Figure 5. The diode</strong> A)produces class- AB operation B)compensates for the base- emitter drops of the transistors C)helps prevent crossover distortion D)all of the above <div style=padding-top: 35px> Figure 5
Refer to Figure 5. The diode

A)produces class- AB operation
B)compensates for the base- emitter drops of the transistors
C)helps prevent crossover distortion
D)all of the above
Question
<strong>  Figure 7 Refer to Figure 7. The power delivered to the load is</strong> A)0.25 W B)1 W C)0.5 W D)2 W <div style=padding-top: 35px> Figure 7
Refer to Figure 7. The power delivered to the load is

A)0.25 W
B)1 W
C)0.5 W
D)2 W
Question
<strong>  Figure 1 Refer to Figure 1. The power gain, Ap, to the load is approximately</strong> A)14 B)4.5 C)23 D)7.9 <div style=padding-top: 35px> Figure 1
Refer to Figure 1. The power gain, Ap, to the load is approximately

A)14
B)4.5
C)23
D)7.9
Question
<strong>  Figure 3 Refer to Figure 3. This type of bias is called</strong> A)current- mirror biasing B)push- pull bias C)diode biasing D)mid- point bias <div style=padding-top: 35px> Figure 3
Refer to Figure 3. This type of bias is called

A)current- mirror biasing
B)push- pull bias
C)diode biasing
D)mid- point bias
Question
<strong>  Figure 5 Refer to Figure 5. The center tap on the output transformer (marked A)should be connected to</strong> A)-VCC B)ground C)+V<sub>CC</sub><sub> </sub>D)nothing, it is left open <div style=padding-top: 35px> Figure 5
Refer to Figure 5. The center tap on the output transformer (marked
A)should be connected to

A)-VCC
B)ground
C)+VCC D)nothing, it is left open
Question
<strong>  Figure 6 Refer to Figure 6. The combination of R1, C1, and the base- emitter diode form a</strong> A)positive clipping circuit B)clamping circuit C)negative clipping circuit D)coupling circuit <div style=padding-top: 35px> Figure 6
Refer to Figure 6. The combination of R1, C1, and the base- emitter diode form a

A)positive clipping circuit
B)clamping circuit
C)negative clipping circuit
D)coupling circuit
Question
<strong>  Figure 2 This is modification of Figure 1 (added Q<sub>2</sub>, Q<sub>3</sub>, and R<sub>L</sub>, deletion of C<sub>3 </sub>and a changed value of R<sub>E1</sub>). Refer to Figure 2. Assume Vout has dropped to about 1/2 the expected value. A likely cause is that</strong> A)VCC is set to +15 V B)C2 is shorted C)R<sub>L</sub><sub> </sub>is open D)C<sub>2 </sub>is open <div style=padding-top: 35px> Figure 2 This is modification of Figure 1 (added Q2, Q3, and RL, deletion of C3 and a changed value of RE1).
Refer to Figure 2. Assume Vout has dropped to about 1/2 the expected value. A likely cause is that

A)VCC is set to +15 V
B)C2 is shorted
C)RL is open
D)C2 is open
Question
Class- C amplifiers are frequently used as audio amplifiers.
Question
<strong>  Figure 1 Refer to Figure 1. The dc collector current is approximately</strong> A)50 mA B)25 mA C)120 mA D)85 mA <div style=padding-top: 35px> Figure 1
Refer to Figure 1. The dc collector current is approximately

A)50 mA
B)25 mA
C)120 mA
D)85 mA
Question
A class- B amplifier with Darlington transistors can use larger bias resistors.
Question
The ratio of Pout to PDC is the efficiency of an amplifier.
Question
The Q point of a class- C amplifier is below cutoff.
Question
The maximum power from a class- A amplifier is equal to ICQVCEQ.
Question
In a class- AB amplifier, the transistors are biased slightly above cutoff to avoid

A)clipping the peaks of signals
B)low efficiency
C)loading problems
D)crossover distortion
Question
<strong>  Figure 6 The transistor in a Class- C amplifier is biased for conduction for</strong> A)360° B)90° C)180° D)much less than 90° <div style=padding-top: 35px> Figure 6
The transistor in a Class- C amplifier is biased for conduction for

A)360°
B)90°
C)180°
D)much less than 90°
Question
In a class- B amplifier, the Q- point is at cutoff.
Question
The maximum ideal efficiency for a class- A amplifier is

A)80%
B)40%
C)55%
D)25%
Question
<strong>  Figure 4 Refer to Figure 4. The amplifier represented is</strong> A)class- C B)class- A C)class- B <div style=padding-top: 35px> Figure 4
Refer to Figure 4. The amplifier represented is

A)class- C
B)class- A
C)class- B
Question
A class- A amplifier the quiescent power is dissipated only when a signal is present.
Question
<strong>  Figure 7 Refer to Figure 7. The expected ac emitter voltage for Q1 is</strong> A)4.0 Vrms B)2.0 Vrms C)0 V D)none of the above <div style=padding-top: 35px> Figure 7
Refer to Figure 7. The expected ac emitter voltage for Q1 is

A)4.0 Vrms
B)2.0 Vrms
C)0 V
D)none of the above
Question
<strong>  Figure 2 This is modification of Figure 1 (added Q<sub>2</sub>, Q<sub>3</sub>, and R<sub>L</sub>, deletion of C<sub>3 </sub>and a changed value of R<sub>E1</sub>). Refer to Figure 2, which is a modified circuit from Figure 1. The voltage gain, AV, of this circuit is approximately</strong> A)3.3 B)5.6 C)2.0 D)4.3 <div style=padding-top: 35px> Figure 2 This is modification of Figure 1 (added Q2, Q3, and RL, deletion of C3 and a changed value of RE1).
Refer to Figure 2, which is a modified circuit from Figure 1. The voltage gain, AV, of this circuit is approximately

A)3.3
B)5.6
C)2.0
D)4.3
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Deck 7: BJT Power Amplifiers
1
<strong>  Figure 1 Refer to Figure 1. The voltage gain, Av, to the load is approximately</strong> A)11 B)7.5 C)5.4 D)2.0 Figure 1
Refer to Figure 1. The voltage gain, Av, to the load is approximately

A)11
B)7.5
C)5.4
D)2.0
D
2
The amplifier type that frequently has a resonant circuit load is

A)class- AB
B)class- C
C)class- B
D)class- A
B
3
The amplifier type that has the worst efficiency is

A)class- B
B)class- A
C)class- C
D)class- AB
B
4
In a single- stage class- A amplifier, the quiescent current is the same as the

A)ac load current
B)dc collector current
C)ac collector current
D)bias current
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5
<strong>  Figure 7 Refer to Figure 7. The expected dc emitter voltage for Q1 is</strong> A)0 V B)9.0 V C)0.7 V D)8.3 V Figure 7
Refer to Figure 7. The expected dc emitter voltage for Q1 is

A)0 V
B)9.0 V
C)0.7 V
D)8.3 V
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6
A heat sink is used to

A)prevent excessive current
B)reduce the junction temperature
C)reduce ambient temperature
D)all of the above
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7
<strong>  Figure 2 This is modification of Figure 1 (added Q<sub>2</sub>, Q<sub>3</sub>, and R<sub>L</sub>, deletion of C<sub>3 </sub>and a changed value of R<sub>E1</sub>). Refer to Figure 2. With no applied signal, the dc power dissipated in the load is approximately</strong> A)1.1 W B)0 C)5.5 W D)2.8 W Figure 2 This is modification of Figure 1 (added Q2, Q3, and RL, deletion of C3 and a changed value of RE1).
Refer to Figure 2. With no applied signal, the dc power dissipated in the load is approximately

A)1.1 W
B)0
C)5.5 W
D)2.8 W
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8
<strong>  Figure 3 Refer to Figure 3. Note the input is a 5 Vrms sine wave. The ac power in RL is ideally</strong> A)1.56 W B)3.12 W C)0.31 W D)0.62 W Figure 3
Refer to Figure 3. Note the input is a 5 Vrms sine wave. The ac power in RL is ideally

A)1.56 W
B)3.12 W
C)0.31 W
D)0.62 W
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9
A class- A amplifier has an input resistance of 520 ▲ and a load resistance of 26 ▲. Assume a 1 Vrms input produces a 5 Vrms output The power gain is

A)5
B)100
C)50
D)500
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10
<strong>  Figure 2 This is modification of Figure 1 (added Q<sub>2</sub>, Q<sub>3</sub>, and R<sub>L</sub>, deletion of C<sub>3 </sub>and a changed value of R<sub>E1</sub>). Refer to Figure 2. If Vin = 1 Vrms, the ac power in RL is approximately</strong> A)2.6 W B)4.0 W C)680 mW D)1.3 W Figure 2 This is modification of Figure 1 (added Q2, Q3, and RL, deletion of C3 and a changed value of RE1).
Refer to Figure 2. If Vin = 1 Vrms, the ac power in RL is approximately

A)2.6 W
B)4.0 W
C)680 mW
D)1.3 W
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11
<strong>  Figure 1 Refer to Figure 1. The input impedance is approximately</strong> A)230 ▲ B)186 ▲ C)125 ▲ D)142 ▲ Figure 1
Refer to Figure 1. The input impedance is approximately

A)230 ▲
B)186 ▲
C)125 ▲
D)142 ▲
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12
<strong>  Figure 3 Refer to Figure 3. The value of dc bias current in R1 is</strong> A)43 mA B)90 mA C)86 mA D)48 mA Figure 3
Refer to Figure 3. The value of dc bias current in R1 is

A)43 mA
B)90 mA
C)86 mA
D)48 mA
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13
<strong>  Figure 3 Refer to Figure 3. With no signal in, IC(Q1)is ideally</strong> A)0 B)86 mA C)43 mA D)48 mA Figure 3
Refer to Figure 3. With no signal in, IC(Q1)is ideally

A)0
B)86 mA
C)43 mA
D)48 mA
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14
Assume the Q point on a class- A amplifier is centered on the ac load line. The maximum peak- to- peak output voltage is

A)1/2 VCEQ
B)2 VCEQ
C)1/2 VCC
D)VCEQ
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15
<strong>  Figure 5 Refer to Figure 5. The diode</strong> A)produces class- AB operation B)compensates for the base- emitter drops of the transistors C)helps prevent crossover distortion D)all of the above Figure 5
Refer to Figure 5. The diode

A)produces class- AB operation
B)compensates for the base- emitter drops of the transistors
C)helps prevent crossover distortion
D)all of the above
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16
<strong>  Figure 7 Refer to Figure 7. The power delivered to the load is</strong> A)0.25 W B)1 W C)0.5 W D)2 W Figure 7
Refer to Figure 7. The power delivered to the load is

A)0.25 W
B)1 W
C)0.5 W
D)2 W
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17
<strong>  Figure 1 Refer to Figure 1. The power gain, Ap, to the load is approximately</strong> A)14 B)4.5 C)23 D)7.9 Figure 1
Refer to Figure 1. The power gain, Ap, to the load is approximately

A)14
B)4.5
C)23
D)7.9
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18
<strong>  Figure 3 Refer to Figure 3. This type of bias is called</strong> A)current- mirror biasing B)push- pull bias C)diode biasing D)mid- point bias Figure 3
Refer to Figure 3. This type of bias is called

A)current- mirror biasing
B)push- pull bias
C)diode biasing
D)mid- point bias
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19
<strong>  Figure 5 Refer to Figure 5. The center tap on the output transformer (marked A)should be connected to</strong> A)-VCC B)ground C)+V<sub>CC</sub><sub> </sub>D)nothing, it is left open Figure 5
Refer to Figure 5. The center tap on the output transformer (marked
A)should be connected to

A)-VCC
B)ground
C)+VCC D)nothing, it is left open
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20
<strong>  Figure 6 Refer to Figure 6. The combination of R1, C1, and the base- emitter diode form a</strong> A)positive clipping circuit B)clamping circuit C)negative clipping circuit D)coupling circuit Figure 6
Refer to Figure 6. The combination of R1, C1, and the base- emitter diode form a

A)positive clipping circuit
B)clamping circuit
C)negative clipping circuit
D)coupling circuit
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21
<strong>  Figure 2 This is modification of Figure 1 (added Q<sub>2</sub>, Q<sub>3</sub>, and R<sub>L</sub>, deletion of C<sub>3 </sub>and a changed value of R<sub>E1</sub>). Refer to Figure 2. Assume Vout has dropped to about 1/2 the expected value. A likely cause is that</strong> A)VCC is set to +15 V B)C2 is shorted C)R<sub>L</sub><sub> </sub>is open D)C<sub>2 </sub>is open Figure 2 This is modification of Figure 1 (added Q2, Q3, and RL, deletion of C3 and a changed value of RE1).
Refer to Figure 2. Assume Vout has dropped to about 1/2 the expected value. A likely cause is that

A)VCC is set to +15 V
B)C2 is shorted
C)RL is open
D)C2 is open
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22
Class- C amplifiers are frequently used as audio amplifiers.
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23
<strong>  Figure 1 Refer to Figure 1. The dc collector current is approximately</strong> A)50 mA B)25 mA C)120 mA D)85 mA Figure 1
Refer to Figure 1. The dc collector current is approximately

A)50 mA
B)25 mA
C)120 mA
D)85 mA
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24
A class- B amplifier with Darlington transistors can use larger bias resistors.
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25
The ratio of Pout to PDC is the efficiency of an amplifier.
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26
The Q point of a class- C amplifier is below cutoff.
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27
The maximum power from a class- A amplifier is equal to ICQVCEQ.
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28
In a class- AB amplifier, the transistors are biased slightly above cutoff to avoid

A)clipping the peaks of signals
B)low efficiency
C)loading problems
D)crossover distortion
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29
<strong>  Figure 6 The transistor in a Class- C amplifier is biased for conduction for</strong> A)360° B)90° C)180° D)much less than 90° Figure 6
The transistor in a Class- C amplifier is biased for conduction for

A)360°
B)90°
C)180°
D)much less than 90°
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30
In a class- B amplifier, the Q- point is at cutoff.
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31
The maximum ideal efficiency for a class- A amplifier is

A)80%
B)40%
C)55%
D)25%
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32
<strong>  Figure 4 Refer to Figure 4. The amplifier represented is</strong> A)class- C B)class- A C)class- B Figure 4
Refer to Figure 4. The amplifier represented is

A)class- C
B)class- A
C)class- B
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33
A class- A amplifier the quiescent power is dissipated only when a signal is present.
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34
<strong>  Figure 7 Refer to Figure 7. The expected ac emitter voltage for Q1 is</strong> A)4.0 Vrms B)2.0 Vrms C)0 V D)none of the above Figure 7
Refer to Figure 7. The expected ac emitter voltage for Q1 is

A)4.0 Vrms
B)2.0 Vrms
C)0 V
D)none of the above
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35
<strong>  Figure 2 This is modification of Figure 1 (added Q<sub>2</sub>, Q<sub>3</sub>, and R<sub>L</sub>, deletion of C<sub>3 </sub>and a changed value of R<sub>E1</sub>). Refer to Figure 2, which is a modified circuit from Figure 1. The voltage gain, AV, of this circuit is approximately</strong> A)3.3 B)5.6 C)2.0 D)4.3 Figure 2 This is modification of Figure 1 (added Q2, Q3, and RL, deletion of C3 and a changed value of RE1).
Refer to Figure 2, which is a modified circuit from Figure 1. The voltage gain, AV, of this circuit is approximately

A)3.3
B)5.6
C)2.0
D)4.3
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