Deck 3: Memory Management: Virtual Memory
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Deck 3: Memory Management: Virtual Memory
1
To find the exact position of an instruction in memory, after the page number has been calculated, the operating system refers to the job's PMT to find out which page frame contains the page.
True
2
To find the address of a given program line, the line number is multiplied by the page size.
False
3
To move in a new page, a resident page must be swapped back into primary storage.
False
4
A variation of the LRU page replacement algorithm is known as the clock page replacement policy because it is implemented with a circular queue and uses a pointer to step through the reference bits of the active pages, simulating a clockwise motion.
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5
The Job Table (JT) contains two entries for each active job: the size of the job and the memory location where its Page Map Table is stored.
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6
Demand paging requires that the Page Map Table for each job keep track of each page as it is loaded or removed from main memory.
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7
Paged memory allocation usually results in internal fragmentation, but never external fragmentation.
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8
The key to the successful implementation of demand paging is the use of a direct access memory device that can work directly with the CPU.
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9
Demand paging was the first widely used scheme that removed the restriction of having the entire job in memory from the beginning to the end of its processing.
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10
A page interrupt is generated when a new page is brought into memory.
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11
Every time an instruction is executed, or a data value is used, the operating system (or the hardware) must translate the job space address, which is relative, into its physical address, which is absolute.
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12
Each page of a job is actually stored in a page frame that can be located anywhere in available main memory.
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13
The process of shifting bits to the right and resetting the leftmost bit to 1 when a page is referenced gives a history of each page's usage.
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14
The first-in first-out (FIFO) page replacement policy will remove the pages that have been in memory the shortest.
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15
Demand paging offers a perfect solution to inefficient memory limitations.
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16
When using a FIFO scheme, more memory will always result in better performance.
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17
Within the Memory Manager the Segment Link Table lists details about each segment (one for each job).
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18
The address of the beginning of a page frame is found by multiplying the page frame number by the number of frames.
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19
A job's working set is the set of pages residing in memory that can be accessed indirectly.
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20
One sector will hold one page of job instructions and fit into one page frame of memory.
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21
The use of virtual memory requires cooperation between the Memory Manager (which tracks each page or segment) and the processor hardware (which issues the interrupt and resolves the virtual address).
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22
Cache memory is a small high-speed memory unit that a processor can access less rapidly than main memory.
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23
There are ____ entries per page in the PMT.
A) 0
B) 1
C) 2
D) 5
A) 0
B) 1
C) 2
D) 5
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24
Consider the following page fault handler algorithm. Replace the * in the algorithm with ____. 1 If there is no free page frame
Then
Select page to be swapped out using page removal algorithm
Update job's Page Map Table
If content of page had been changed then
*
End if
End if
2 Use page number from step 3 from the Hardware Instruction Processing Algorithm to get disk address where the requested page is stored
3 Read page into memory
4 Update job's Page Map Table
5 Update Memory Map Table
6 Restart interrupted instruction
A) save page to main memory
B) write page to disk
C) mark page as being changed in PMT
D) choose another page
Then
Select page to be swapped out using page removal algorithm
Update job's Page Map Table
If content of page had been changed then
*
End if
End if
2 Use page number from step 3 from the Hardware Instruction Processing Algorithm to get disk address where the requested page is stored
3 Read page into memory
4 Update job's Page Map Table
5 Update Memory Map Table
6 Restart interrupted instruction
A) save page to main memory
B) write page to disk
C) mark page as being changed in PMT
D) choose another page
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25
The optimal selection of cache size and replacement algorithm can result in 80 to 90 percent of all requests being in the cache.
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26
If a particular demand paging configuration has 9 page interrupts out of 11 page requests, failure rate is ____.
A) 18%
B) 52%
C) 82%
D) 95%
A) 18%
B) 52%
C) 82%
D) 95%
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27
In demand paging when a job requires a certain page to be loaded and there is no empty page frame,____ .
A) A resident page must be swapped back into secondary storage.
B) The page cannot be loaded and the job will exit.
C) The job must wait until a page frame is freed by another job.
D) The page will share a page frame with another page from the same job.
A) A resident page must be swapped back into secondary storage.
B) The page cannot be loaded and the job will exit.
C) The job must wait until a page frame is freed by another job.
D) The page will share a page frame with another page from the same job.
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28
In general, when a job is allocated to the CPU its Page Map Table is loaded into main memory while the Segment Map Tables are loaded only as needed.
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29
The primary advantage of storing programs in noncontiguous locations is that ____.
A) multiple programs can run at the same time
B) every program will be able to run
C) secondary storage is accessed more quickly
D) main memory is used more efficiently
A) multiple programs can run at the same time
B) every program will be able to run
C) secondary storage is accessed more quickly
D) main memory is used more efficiently
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30
Assume that the Page Map Table below is in effect. The number of lines per page is 400. The actual memory location for line 433 is ____. Job Page Number Page Frame Number
0 8
1 10
2 5
3 11
A) 1
B) 33
C) 4000
D) 4033
0 8
1 10
2 5
3 11
A) 1
B) 33
C) 4000
D) 4033
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31
A page size that is too small will generate ____.
A) very long PMTs
B) excessive internal fragmentation
C) more difficult to calculate actual position
D) excessive external fragmentation
A) very long PMTs
B) excessive internal fragmentation
C) more difficult to calculate actual position
D) excessive external fragmentation
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32
The segmented/demand paged memory allocation scheme offers the logical benefits of segmentation, as well as the physical benefits of paging.
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33
When there is an excessive amount of page swapping between main memory and secondary storage, the operation becomes inefficient, which is called ____.
A) excessive demand paging
B) hot swapping
C) thrashing
D) overswapping
A) excessive demand paging
B) hot swapping
C) thrashing
D) overswapping
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34
The ____ policy is based on the theory that the best page to remove is the one that has been in memory the longest.
A) TRU
B) LRU
C) LIFO
D) FIFO
A) TRU
B) LRU
C) LIFO
D) FIFO
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35
Assume that four page frames are available and are numbered 1-4. Pages A-D have been loaded into page frames 1-4 in order. Assume that page E is requested.The page frame to be loaded into when the FIFO algorithm is used is ____.
A) 1
B) 2
C) 3
D) 4
A) 1
B) 2
C) 3
D) 4
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36
With demand paging, jobs are divided into equally sized ____ that initially reside in secondary storage.
A) pages
B) blocks
C) frames
D) sets
A) pages
B) blocks
C) frames
D) sets
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37
If the page size is 100 lines,____ is the displacement for line 214 of a program.
A) 0.5
B) 2
C) 14
D) 21400
A) 0.5
B) 2
C) 14
D) 21400
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38
When using the clock replacement policy, a page with a reference bit of ____ is replaced.
A) -1
B) 0
C) 1
D) 5
A) -1
B) 0
C) 1
D) 5
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39
One of the most important innovations of demand paging was that it made ____ feasible.
A) memory demand
B) virtual demand
C) virtual paging
D) virtual memory
A) memory demand
B) virtual demand
C) virtual paging
D) virtual memory
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40
Assume that four page frames are available and are numbered 1-4. Pages A-D have been loaded into page frames 1-4 in order. The program has accessed the pages in the following order: B, D, A, C. Assume that page E is requested. The ____ page frame will be loaded when the LRU algorithm is used.
A) 1
B) 2
C) 3
D) 4
A) 1
B) 2
C) 3
D) 4
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41
During the second generation, programmers started dividing their programs into sections that resembled working sets, really segments, originally called roll in/roll out and now called ____.
A) undermaps
B) overmaps
C) underlays
D) overlays
A) undermaps
B) overmaps
C) underlays
D) overlays
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42
To access a location in memory when using segmented memory management, the address is composed of two entries: ____.
A) the segment number and the line number
B) the segment number and the displacement
C) the line number and the displacement
D) the segment number, the line number, and the displacement
A) the segment number and the line number
B) the segment number and the displacement
C) the line number and the displacement
D) the segment number, the line number, and the displacement
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43
There are ____associative registers.
A) two
B) five
C) ten
D) varies by system
A) two
B) five
C) ten
D) varies by system
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44
Consider the following four cases. The LRU policy,____, will be lease likely to swap. Modified Referenced Meaning
Case 1 0 0 Not modified AND not referenced
Case 2 0 1 Not modified BUT was referenced
Case 3 1 0 Was modified BUT not referenced
Case 4 1 1 Was modified AND was referenced
A) Case 1
B) Case 2
C) Case 3
D) Case 4
Case 1 0 0 Not modified AND not referenced
Case 2 0 1 Not modified BUT was referenced
Case 3 1 0 Was modified BUT not referenced
Case 4 1 1 Was modified AND was referenced
A) Case 1
B) Case 2
C) Case 3
D) Case 4
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45
The following phrase____,means that during any phase of its execution, the program references only a small fraction of its pages.
A) dynamic paging
B) structured programming
C) locality of reference
D) working set
A) dynamic paging
B) structured programming
C) locality of reference
D) working set
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46
The cache hit ratio is ____, if the total number of requests is 10 and 6 of those are found in cache memory.
A) 6%
B) 10%
C) 60%
D) 100%
A) 6%
B) 10%
C) 60%
D) 100%
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47
____ can be thought of as being an intermediary between main memory and the special-purpose registers, which are the domain of the CPU.
A) Virtual memory
B) Cache memory
C) Paging
D) Segmenting
A) Virtual memory
B) Cache memory
C) Paging
D) Segmenting
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48
____ gives users the appearance that their programs are being completely loaded in main memory during their entire processing time.
A) Segmenting
B) Virtual memory
C) Shared memory
D) Multithreading
A) Segmenting
B) Virtual memory
C) Shared memory
D) Multithreading
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49
Studies have shown that having any ____, even a small one, can substantially improve the performance of the computer system.
A) cache
B) memory block
C) page block
D) block
A) cache
B) memory block
C) page block
D) block
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50
In the PMT, the ____ bit for all pages in memory is 1.
A) status
B) referenced
C) modified
D) frame
A) status
B) referenced
C) modified
D) frame
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