-The circuit in Figure 8- 1 fails to produce the proper data output. The individual flip- flops are checked with a logic probe and pulser and each checks OK. What is the most likely cause of the problem?
A) The data output line is grounded.
B) One of the flip- flops has a solder bridge between its input and Vcc.
C) One of the interconnect lines between two stages has a solder bridge to ground.
D) One of the clock input lines is open.

Question

-The circuit in Figure 8- 1 fails to produce the proper data output. The individual flip- flops are checked with a logic probe and pulser and each checks OK. What is the most likely cause of the problem?
A) The data output line is grounded. 
B) One of the flip- flops has a solder bridge between its input and Vcc. 
C) One of the interconnect lines between two stages has a solder bridge to ground. 
D) One of the clock input lines is open.

Quizplus · Accepted Answer

An open clock input line to one of the flip-flops would prevent it from changing state in sync with the others, leading to incorrect data output despite each flip-flop functioning properly when tested individually.

-The Circuit in Figure 8- 1 Fails to Produce the Proper