When an open occurs on the input of a CMOS gate, the output will _________ .
A) be treated as if the open input were a HIGH
B) go LOW, because there is no current in an open circuit
C) go HIGH, since full voltage appears across an open
D) be unpredictable; it may go HIGH or LOW
Correct Answer:
Verified
Q43: The fanout for standard bipolar logic devices
Q44: The term "hex inverter" refers to _.
A)
Q45: Which type of gate can be used
Q46: An AND gate is checked for operation
Q47: When an open occurs on the input
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Q50: What programmable arrays are in PLD's?
A) NOR
Q51: Which of the following is not a
Q52: HDL stands for _ .
A) hardwired digital logic
B)
Q53: HDLs differ from_ in that they include
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