The following instruction will produce 1FFFFFFCh in EDX:
movsx edx,-4
Correct Answer:
Verified
Q1: The following statement will assemble without errors:
mov
Q2: If AL contains +127 and you add
Q4: The MOVSX instruction can use a variable
Q5: The Overflow flag will never be set
Q6: The SUB instruction requires the source operand
Q7: When you move a 16-bit constant or
Q8: The format for the ADD instruction is:
Q9: The MOV instruction permits a move between
Q10: The SAHF instruction copies the CPU status
Q11: The following instructions will set the Overflow
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