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Figure 3 Assume IDSS = 3

Question 5

Multiple Choice

Figure 3 Assume I<sub>DSS </sub>= 3.5 mA and V<sub>GS(off) </sub>= -2 V. -If a JFET bias circuit is designed with current- source biasing, A) ID is constant for any JFET B) IDSS is constant for any JFET C) V<sub>GS </sub>is constant for any JFET D) V<sub>GS(off) </sub>is constant for any JFET Figure 3 Assume IDSS = 3.5 mA and VGS(off) = -2 V.
-If a JFET bias circuit is designed with current- source biasing,


A) ID is constant for any JFET
B) IDSS is constant for any JFET
C) VGS is constant for any JFET
D) VGS(off) is constant for any JFET

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