Question 1

In which part of a computer does CPU scheduling occur?

Accepted Answer

CPU scheduling is a function of the operating system, which decides the order in which processes access the CPU for execution.

Question 2

A software developer needs to design an application in which multiple parts of the application can be scheduled and executed simultaneously. What is each part of an application that can be independently scheduled called?

Accepted Answer

Each part of an application that can be independently scheduled and executed simultaneously is called a thread. Threads allow for parallel execution within the same application, sharing the same process space, which makes them lighter than processes.

Question 3

You want your server to be able to access at least 128 GB of RAM. What specification must the system have for this requirement to be met?

Accepted Answer

A 64-bit address bus is required to access at least 128 GB of RAM because it provides the address space necessary to support such a large amount of memory. A 32-bit address bus can only directly address up to 4 GB of RAM, and while a data bus width (whether 32-bit or 64-bit) affects data transfer speed, it's the address bus width that determines the maximum amount of memory that can be addressed.

Question 4

What is a name given to the process of a CPU switching between applications very quickly?

Accepted Answer

Time slicing is the process where the CPU switches between different tasks or applications very quickly, giving the illusion that it is executing them simultaneously. This is a fundamental aspect of multitasking in operating systems.

Question 5

You are reading the specifications of a computer that supports quad-core CPUs. The computer supports up to a maximum of 16 cores. What must be true about this computer?

Accepted Answer

This computer must be a multiprocessor computer because to support up to 16 cores with quad-core CPUs, it would need multiple CPUs (at least 4 quad-core CPUs), as a single quad-core CPU can only provide 4 cores.

Question 6

You are discussing a CPU that will be used on a new project. Your colleague comments that the CPU he has in mind does not use microcode. What type of CPU is being discussed?

Accepted Answer

RISC (Reduced Instruction Set Computer) CPUs are designed with a smaller set of simple instructions that can be executed directly by the hardware without the need for microcode, which is a layer of abstraction used in more complex CPUs to execute more complex instructions.

Question 7

What is the silicon wafer called that the CPU circuitry is manufactured on?

Accepted Answer

The silicon wafer that the CPU circuitry is manufactured on is called a die. This term refers to a single, distinct piece of semiconductor material, typically silicon, on which a given functional circuit is fabricated.

Question 8

An analysis of a running system shows that the system is frequently being interrupted to execute program code related to interrupts. How does the CPU know when it must execute this code?

Accepted Answer

The CPU knows when it must execute interrupt-related code because IRQ (Interrupt Request) information is carried by the control bus. This allows devices to signal the CPU directly that they need attention, without the CPU having to periodically check each device.

Question 9

You have just installed a single quad-core processor onto a new computer motherboard and installed Windows 10. When Windows 10 boots, you run Task Manager and it reports 8 logical processors. If the CPU is a quad-core processor, why is Task Manager reporting 8 logical processors?

Accepted Answer

The CPU is a hyper-threading processor, which allows each physical core to handle two threads simultaneously, effectively doubling the number of logical processors that the operating system can utilize. This is why Task Manager reports 8 logical processors for a quad-core CPU with hyper-threading enabled.

Question 10

Which type of cache is found as part of more advanced CPUs, is shared among the CPU cores and typically comes in sizes of 8 and 16 MB?

Accepted Answer

Level 3 (L3) cache is often shared among the CPU cores and typically comes in sizes like 8 and 16 MB, making it larger and slower than L1 and L2 caches but faster than main memory.

Question 11

A CPU has just been powered on and it stores an address into one of its registers. Where did the CPU store the address?

Accepted Answer

When a CPU is powered on, it typically stores the initial start address of its firmware or operating system in the program counter. This address, often referred to as the reset vector, tells the CPU where to begin executing instructions. The program counter (PC) is specifically designed to hold the address of the next instruction to be executed, making option B the correct answer.

Question 12

If two parts of the same process can be executed simultaneously by the CPU, what feature is being used?

Accepted Answer

Multithreading allows different parts of a single process to be executed simultaneously, making efficient use of CPU resources by performing multiple tasks at the same time within the same program.

Question 13

Which of the following is NOT considered part of a computer's system architecture?

Accepted Answer

The kernel is part of the operating system, not the computer's system architecture, which typically refers to the hardware components and their interconnections, such as the CPU type, address bus, and data bus.

Question 14

You have just finished writing a program that uses instructions such as load R1, X and stor R1, Z. What must be used to create opcodes from those instructions?

Accepted Answer

An assembler is used to convert assembly language instructions, like "load R1, X" and "stor R1, Z", into machine code opcodes that the computer's CPU can execute.

Question 15

A CPU has just been powered on and it immediately executes a machine code instruction. What is the most likely type of instruction that it executed?

Accepted Answer

Upon powering on, a CPU typically starts executing instructions from a predefined memory location, often performing a jump instruction to the start of the firmware (such as BIOS or UEFI) to begin the boot process.

Question 16

On most computers, what type of code is usually found where the reset vector points to?

Accepted Answer

The reset vector typically points to the initial startup code of a computer, which is the operating system boot code. This code is responsible for initializing the hardware and loading the operating system kernel from disk into memory during the boot process.

Question 17

If you are concerned about how many bytes per second your computer can transfer from main memory to the CPU, what part of the computer should you investigate to determine this figure?

Accepted Answer

The data bus width and the external clock speed directly influence the rate at which data can be transferred from the main memory to the CPU. The data bus width determines how much data can be moved at once, and the external clock speed affects how quickly these transfers can occur.

Question 18

What address does a CPU read when power is first applied?

Accepted Answer

The CPU reads from the reset vector when power is first applied. The reset vector is a specific address that contains the starting address where the CPU begins execution. This is typically located in ROM or a similar non-volatile memory area.

Question 19

While troubleshooting a computer hardware problem, you find that the processor is not being informed when a device has data ready to be read or written. What is the likely problem?

Accepted Answer

The likely problem is with IRQs (Interrupt Requests). IRQs are signals sent to the CPU to alert it that a device needs its attention, allowing the processor to manage data transfer efficiently. If the processor is not being informed when a device has data ready, it suggests an issue with the interrupt request system.

Question 20

Which of the following is true about single-processor computers?

Accepted Answer

Single-processor computers have one physical CPU chip, but they can have multiple cores and can run multiple processes using time-sharing.

Quiz 3: The Central Processing Unit CPU