Question 1

NVIDIA CUDA Warp is made up of how many threads?
A)512
B)1024
C)312
D)32

Accepted Answer

A CUDA warp consists of 32 threads, which are executed simultaneously by the GPU.

Question 2

Out-of-order instructions is not possible on GPUs.

Accepted Answer

GPUs are designed to handle multiple instructions simultaneously, allowing for out-of-order execution as part of their parallel processing capabilities.

Question 3

CUDA supports programming in ....
A)c or c++ only
B)java, python, and more
C)c, c++, third party wrappers for java, python, and more
D)pascal

Accepted Answer

CUDA primarily supports programming in C and C++, but it also allows for programming through third-party wrappers in other languages such as Java, Python, and more, enabling a broader range of developers to utilize GPU acceleration in their applications.

Question 4

FADD, FMAD, FMIN, FMAX are ----- supported by Scalar Processors of NVIDIA GPU.
A)32-bit ieee floating point instructions
B)32-bit integer instructions
C)both
D)none of the above

Accepted Answer

FADD, FMAD, FMIN, FMAX are 32-bit IEEE floating point instructions supported by Scalar Processors of NVIDIA GPUs, designed for operations with floating-point numbers.

Question 5

Each streaming multiprocessor (SM) of CUDA herdware has ------ scalar processors (SP).
A)1024
B)128
C)512
D)8

Accepted Answer

Each streaming multiprocessor (SM) in CUDA hardware typically has 8 scalar processors (SPs).

Question 6

Each NVIDIA GPU has ------ Streaming Multiprocessors
A)8
B)1024
C)512
D)16

Accepted Answer

The number of Streaming Multiprocessors (SMs) in an NVIDIA GPU varies by model and architecture, but none of the current models have 8, 1024, or 512 SMs. The choice of 16 is also not universally correct for all NVIDIA GPUs, but it's closer to the configurations found in several models compared to the other options. However, it's important to note that the exact number can be significantly higher or lower depending on the specific GPU model and architecture (e.g., Turing, Ampere).

Question 7

CUDA provides ------- warp and thread scheduling. Also, the overhead of thread creation is on the order of ----.
A)"programming-overhead", 2 clock
B)"zero-overhead", 1 clock
C)64, 2 clock
D)32, 1 clock

Accepted Answer

CUDA provides "zero-overhead" warp and thread scheduling, and the overhead of thread creation is on the order of 1 clock cycle.

Question 8

Each warp of GPU receives a single instruction and "broadcasts" it to all of its threads. It is a ---- operation.
A)simd (single instruction multiple data)
B)simt (single instruction multiple thread)
C)sisd (single instruction single data)
D)sist (single instruction single thread)

Accepted Answer

The operation described is SIMT (Single Instruction Multiple Thread), where a single instruction is broadcasted to multiple threads within a warp in a GPU.

Question 9

Limitations of CUDA Kernel
A)recursion, call stack, static variable declaration
B)no recursion, no call stack, no static variable declarations
C)recursion, no call stack, static variable declaration
D)no recursion, call stack, no static variable declarations

Accepted Answer

CUDA kernels have limitations including no support for recursion, no call stack, and restrictions on static variable declarations.

Question 10

What is Unified Virtual Machine
A)it is a technique that allow both cpu and gpu to read from single virtual machine, simultaneously.
B)it is a technique for managing separate host and device memory spaces.
C)it is a technique for executing device code on host and host code on device.
D)it is a technique for executing general purpose programs on device instead of host.

Accepted Answer

Unified Virtual Memory (UVM) is a technique that allows both the CPU and GPU to access the same virtual memory space, enabling easier data sharing and management between the two.

Question 11

_______ became the first language specifically designed by a GPU Company to facilitate general purpose computing on ____.
A)python, gpus.
B)c, cpus.
C)cuda c, gpus.
D)java, cpus.

Accepted Answer

CUDA C became the first language specifically designed by a GPU company (NVIDIA) to facilitate general-purpose computing on graphics processing units (GPUs).

Question 12

The CUDA architecture consists of --------- for parallel computing kernels and functions.
A)risc instruction set architecture
B)cisc instruction set architecture
C)zisc instruction set architecture
D)ptx instruction set architecture

Accepted Answer

CUDA architecture uses PTX (Parallel Thread Execution) instruction set architecture for defining parallel computing kernels and functions. PTX serves as an intermediate representation in NVIDIA's CUDA programming environment, allowing for efficient execution of parallel kernels on NVIDIA GPUs.

Question 13

CUDA stands for --------, designed by NVIDIA.
A)common union discrete architecture
B)complex unidentified device architecture
C)compute unified device architecture
D)complex unstructured distributed architecture

Accepted Answer

CUDA stands for Compute Unified Device Architecture, which is a parallel computing platform and application programming interface (API) model created by NVIDIA.

Question 14

The host processor spawns multithread tasks (or kernels as they are known in CUDA) onto the GPU device.

Accepted Answer

In CUDA programming, the host processor (CPU) offloads parallel computing tasks by spawning multiple threads, organized into blocks and grids, onto the GPU device for execution. These parallel tasks are referred to as kernels in CUDA terminology.

Question 15

The NVIDIA G80 is a ---- CUDA core device, the NVIDIA G200 is a ---- CUDA core device, and the NVIDIA Fermi is a ---- CUDA core device.
A)128, 256, 512
B)32, 64, 128
C)64, 128, 256
D)256, 512, 1024

Accepted Answer

The NVIDIA G80, G200, and Fermi architectures have progressively increased the number of CUDA cores per device, with G80 having 128 CUDA cores, G200 having 256 CUDA cores, and Fermi having 512 CUDA cores.

Question 16

NVIDIA 8-series GPUs offer -------- .
A)50-200 gflops
B)200-400 gflops
C)400-800 gflops
D)800-1000 gflops

Accepted Answer

The answer of NVIDIA 8-series GPUs offer -------- .
A)50-200 gflops
B)200-400...

Question 17

IADD, IMUL24, IMAD24, IMIN, IMAX are ----------- supported by Scalar Processors of NVIDIA GPU.
A)32-bit ieee floating point instructions
B)32-bit integer instructions
C)both
D)none of the above

Accepted Answer

These are 32-bit integer instructions supported by Scalar Processors of NVIDIA GPU.

Question 18

CUDA Hardware programming model supports:
A. fully generally data-parallel archtecture;
B. General thread launch;
C. Global load-store;
D. Parallel data cache;
E. Scalar architecture;
F. Integers, bit operation
A)a,c,d,f
B)b,c,d,e
C)a,d,e,f
D)a,b,c,d,e,f

Accepted Answer

CUDA supports a fully general data-parallel architecture, general thread launch, global load-store, parallel data cache, scalar architecture, and operations on integers and bits.

Question 19

In CUDA memory model there are following memory types available:
A. Registers;
B. Local Memory;
C. Shared Memory;
D. Global Memory;
E. Constant Memory;
F. Texture Memory.
A)a, b, d, f
B)a, c, d, e, f
C)a, b, c, d, e, f
D)b, c, e, f

Accepted Answer

CUDA memory model includes Registers, Local Memory, Shared Memory, Global Memory, Constant Memory, and Texture Memory, covering all the options listed.

Question 20

What is the equivalent of general C program with CUDA C: Int main(void) { Printf("Hello, World! "); Return 0; } A) int main ( void ) { Kernel <<<1,1>>>(); Printf("hello, world!\n"); Return 0; } B)__global__ void kernel( void ) { } Int main ( void ) { kernel <<<1,1>>>(); Printf("hello, world!\n"); Return 0; } C)__global__ void kernel( void ) { Kernel <<<1,1>>>(); Printf("hello, world!\n"); Return 0; } D)__global__ int main ( void ) { Kernel <<<1,1>>>(); Printf("hello, world!\n"); Return 0; }

Accepted Answer

Option B is correct because it correctly defines a CUDA kernel using `__global__` and then calls this kernel from the `main` function. The `kernel <<<1,1>>>();` syntax is used to launch the kernel with one block of one thread, which is the CUDA equivalent of running a single task, similar to the simple "Hello, World!" program in the question. The `printf` statement remains in the `main` function, which is executed by the host (CPU).

Quiz 2: Nvidia CUDA and GPU Programming

NVIDIA CUDA Warp is made up of how many threads?

Out-of-order instructions is not possible on GPUs.

CUDA supports programming in ....

FADD, FMAD, FMIN, FMAX are ----- supported by Scalar Processors of NVIDIA GPU.

Each streaming multiprocessor (SM) of CUDA herdware has ------ scalar processors (SP) .

Each NVIDIA GPU has ------ Streaming Multiprocessors

CUDA provides ------- warp and thread scheduling. Also, the overhead of thread creation is on the order of ----.

Each warp of GPU receives a single instruction and "broadcasts" it to all of its threads. It is a ---- operation.

Limitations of CUDA Kernel

What is Unified Virtual Machine

___ became the first language specifically designed by a GPU Company to facilitate general purpose computing on .

The CUDA architecture consists of --------- for parallel computing kernels and functions.

CUDA stands for --------, designed by NVIDIA.

The host processor spawns multithread tasks (or kernels as they are known in CUDA) onto the GPU device.

The NVIDIA G80 is a ---- CUDA core device, the NVIDIA G200 is a ---- CUDA core device, and the NVIDIA Fermi is a ---- CUDA core device.

NVIDIA 8-series GPUs offer -------- .

IADD, IMUL24, IMAD24, IMIN, IMAX are ----------- supported by Scalar Processors of NVIDIA GPU.

CUDA Hardware programming model supports: A. fully generally data-parallel archtecture; B. General thread launch; C. Global load-store; D. Parallel data cache; E. Scalar architecture; F. Integers, bit operation

In CUDA memory model there are following memory types available: A. Registers; B. Local Memory; C. Shared Memory; D. Global Memory; E. Constant Memory; F. Texture Memory.

What is the equivalent of general C program with CUDA C: Int main(void) { Printf("Hello, World!\n") ; Return 0; }