Question 1

A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______ .
A)super-scaling
B)pipe-lining
C)parallel computation
D)none of these

Accepted Answer

This process is known as pipelining. It allows the processor to work on multiple instructions at different stages (fetch, decode, execute, etc.) simultaneously, improving overall performance by making efficient use of the CPU resources.

Question 2

General MIMD configuration usually called
A)a multiprocessor
B)a vector processor
C)array processor
D)none of the above.

Accepted Answer

General MIMD (Multiple Instruction, Multiple Data) configurations are usually called multiprocessors. This is because they consist of multiple processing units, each of which can execute different instructions on different data simultaneously.

Question 3

A Von Neumann computer uses which one of the following?
A)sisd
B)simd
C)misd
D)mimd.

Accepted Answer

A Von Neumann computer architecture is based on the Single Instruction, Single Data (SISD) stream concept, where the computer processes one instruction on one piece of data at a time.

Question 4

MIMD stands for
A)multiple instruction multiple data
B)multiple instruction memory data
C)memory instruction multiple data
D)multiple information memory data

Accepted Answer

MIMD stands for Multiple Instruction, Multiple Data, a class of parallel architecture where multiple processors execute different instructions on different data.

Question 5

MIPS stands for:
A)memory instruction per second
B)major instruction per second
C)main information per second
D)million instruction per second

Accepted Answer

MIPS stands for "million instructions per second," a measure of the computational speed of computers or processors.

Question 6

M.J. Flynn's parallel processing classification is based on:
A)multiple instructions
B)multiple data
C)both (a) and (b)
D)none of the above

Accepted Answer

Flynn's classification scheme for parallel processing architectures is based on the concepts of multiple instructions and multiple data streams, thus involving both (a) and (b).

Question 7

VLIW stands for:
A)vector large instruction word
B)very long instruction word
C)very large integrated word
D)very low integrated word

Accepted Answer

VLIW stands for "Very Long Instruction Word." This architecture allows the execution of multiple operations in a single long instruction, enhancing parallel processing capabilities.

Question 8

The major disadvantage of pipeline is:
A)high cost individual dedicated
B)initial setup time
C)if branch instruction is encountered the pipe has to be flushed
D)all of the above

Accepted Answer

The answer of The major disadvantage of pipeline is:
A)high cost...

Question 9

A topology that involves Tokens.
A)star
B)ring
C)bus
D)daisy chaining

Accepted Answer

Ring topology involves the use of tokens for data transmission. In a ring network, each computer is connected to two other computers, forming a circular data path. The token, a special data packet, travels around the ring, and only the computer that holds the token can send data, ensuring orderly and collision-free data transmission.

Question 10

In super-scalar mode, all the similar instructions are grouped and executed together.

Accepted Answer

The answer of In super-scalar mode, all the similar instructions...

Question 11

Which mechanism performs an analysis on the code to determine which data items may become unsafe for caching, and they mark those items accordingly?
A)directory protocol
B)snoopy protocol
C)server based cache coherence
D)compiler based cache coherence

Accepted Answer

Compiler-based cache coherence mechanisms analyze the code to determine which data items may become unsafe for caching and mark those items to ensure cache coherence is maintained without relying on runtime protocols.

Question 12

How many processors can be organized in 5-dimensional binary hypercube system?
A)25
B)10
C)32
D)20

Accepted Answer

A 5-dimensional binary hypercube system can organize 2^5 = 32 processors.

Question 13

Multiprocessors are classified as ________.
A)simd
B)mimd
C)sisd
D)misd

Accepted Answer

Multiprocessors are classified as MIMD (Multiple Instruction, Multiple Data), which means each processor may be executing a different instruction stream, each on different data.

Question 14

Which of the following is not one of the interconnection structures?
A)crossbar switch
B)hypercube system
C)single port memory
D)time-shared common bus

Accepted Answer

Single port memory is not an interconnection structure; it refers to a type of memory access mechanism. Interconnection structures like crossbar switches, hypercube systems, and time-shared common buses are used to connect multiple processors and memory modules in parallel computing systems.

Question 15

Which combinational device is used in crossbar switch for selecting proper memory from multiple addresses?
A)multiplexer
B)decoder
C)encoder
D)demultiplexer

Accepted Answer

A multiplexer is used in a crossbar switch to select one of many inputs (addresses) to be connected to a single output (memory), effectively routing the correct address to the desired memory location.

Question 16

How many switch points are there in crossbar switch network that connects 9 processors to 6 memory modules?
A)50
B)63
C)60
D)54

Accepted Answer

The answer of How many switch points are there in...

Question 17

In a three-cube structure, node 101 cannot communicate directly with node?
A)1
B)11
C)100
D)111

Accepted Answer

The answer of In a three-cube structure, node 101 cannot...

Question 18

Which method is used as an alternative way of snooping-based coherence protocol?
A)directory protocol
B)memory protocol
C)compiler based protocol
D)none of above

Accepted Answer

Directory protocols are used as an alternative to snooping-based coherence protocols in distributed shared memory systems to keep track of the sharing status of blocks of memory. They help in managing cache coherence in systems where it's impractical to use snooping due to scalability issues.

Question 19

snoopy cache protocol are used in -----------------based system
A)bus
B)mesh
C)star
D)hypercube

Accepted Answer

Snoopy cache protocols are used in bus-based systems. These protocols rely on a shared bus to monitor data requests and ensure cache coherence by "snooping" on the transactions occurring on the bus.

Question 20

superscalar architecture contains -------------execution units for instruction execution
A)multiple
B)single
C)none of the above

Accepted Answer

Superscalar architecture is characterized by its ability to execute multiple instructions simultaneously due to having multiple execution units. This allows for parallel instruction processing, increasing the efficiency and speed of the computing process.

Quiz 9: Computer Architecture and Multiprocessor Systems

A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______ .

General MIMD configuration usually called

A Von Neumann computer uses which one of the following?

MIMD stands for

MIPS stands for:

M.J. Flynn's parallel processing classification is based on:

VLIW stands for:

The major disadvantage of pipeline is:

A topology that involves Tokens.

In super-scalar mode, all the similar instructions are grouped and executed together.

Which mechanism performs an analysis on the code to determine which data items may become unsafe for caching, and they mark those items accordingly?

How many processors can be organized in 5-dimensional binary hypercube system?

Multiprocessors are classified as ________.

Which of the following is not one of the interconnection structures?

Which combinational device is used in crossbar switch for selecting proper memory from multiple addresses?

How many switch points are there in crossbar switch network that connects 9 processors to 6 memory modules?

In a three-cube structure, node 101 cannot communicate directly with node?

Which method is used as an alternative way of snooping-based coherence protocol?

snoopy cache protocol are used in -----------------based system

superscalar architecture contains -------------execution units for instruction execution