Solved

Figure 132 VDD=VSS=1 VV_{D D}=V_{S S}=1 \mathrm{~V} And Vtn=Vtp=0.4 VV_{t n}=-V_{t p}=0.4 \mathrm{~V} , and Assume That for All Transistors

Question 2

Essay

     Figure 13.2.1 It is required to design the folded-cascode op amp shown in Fig. 13.2.1. Let  V_{D D}=V_{S S}=1 \mathrm{~V}  and  V_{t n}=-V_{t p}=0.4 \mathrm{~V} , and assume that for all transistors,  \left|V_{A}\right|=6 \mathrm{~V} . Design so that the power dissipated in the circuit (with no input signal applied) is  0.6 \mathrm{~mW} , and so that each of  Q_{1}  and  Q_{2}  is operating at a current four times that at which each of  Q_{3}  and  Q_{4}  is operating. Also, design so that all transistors operate at  \left|V_{O V}\right|=0.2 \mathrm{~V} . (a) Show that the current drawn from each of the two power supplies is  2 I_{B} , and hence find  I_{B}  and  I  that result in the circuit operating at its specified power dissipation. (b) Find the dc current at which each of  Q_{1}  to  Q_{11}  is operating. Present your results in a table. (c) Find the input common-mode range.  (d) Find the required values of  V_{\mathrm{BIAS} 1}, V_{\mathrm{BIAS} 2} , and  V_{\mathrm{BIAS} 3}  that result in the maximum allowable value of  v_{O}  to be as high as possible. (e) Find the allowable range of  v_{O} . (f) Find the overall transconductance  G_{m} . (g) Find the output resistance  R_{O} . (h) Find the low-frequency voltage gain. (i) If the amplifier at its output is modeled by a controlled current-source  G_{m} V_{i d}  (where  V_{i d}  is the differential input voltage) feeding the output resistance  R_{O}  and the total capacitance at the output node  C_{L} , find the value of  C_{L}  that results in the amplifier having a unity-gain bandwidth of  100 \mathrm{MHz} . Assume that the dominant pole is that formed at the output.

Figure 13.2.1
It is required to design the folded-cascode op amp shown in Fig. 13.2.1. Let VDD=VSS=1 VV_{D D}=V_{S S}=1 \mathrm{~V} and Vtn=Vtp=0.4 VV_{t n}=-V_{t p}=0.4 \mathrm{~V} , and assume that for all transistors, VA=6 V\left|V_{A}\right|=6 \mathrm{~V} . Design so that the power dissipated in the circuit (with no input signal applied) is 0.6 mW0.6 \mathrm{~mW} , and so that each of Q1Q_{1} and Q2Q_{2} is operating at a current four times that at which each of Q3Q_{3} and Q4Q_{4} is operating. Also, design so that all transistors operate at VOV=0.2 V\left|V_{O V}\right|=0.2 \mathrm{~V} .
(a) Show that the current drawn from each of the two power supplies is 2IB2 I_{B} , and hence find IBI_{B} and II that result in the circuit operating at its specified power dissipation.
(b) Find the dc current at which each of Q1Q_{1} to Q11Q_{11} is operating. Present your results in a table.
(c) Find the input common-mode range.
(d) Find the required values of VBIAS1,VBIAS2V_{\mathrm{BIAS} 1}, V_{\mathrm{BIAS} 2} , and VBIAS3V_{\mathrm{BIAS} 3} that result in the maximum allowable value of vOv_{O} to be as high as possible.
(e) Find the allowable range of vOv_{O} .
(f) Find the overall transconductance GmG_{m} .
(g) Find the output resistance ROR_{O} .
(h) Find the low-frequency voltage gain.
(i) If the amplifier at its output is modeled by a controlled current-source GmVidG_{m} V_{i d} (where VidV_{i d} is the differential input voltage) feeding the output resistance ROR_{O} and the total capacitance at the output node CLC_{L} , find the value of CLC_{L} that results in the amplifier having a unity-gain bandwidth of 100MHz100 \mathrm{MHz} . Assume that the dominant pole is that formed at the output.

Correct Answer:

verifed

Verified

Related Questions

Unlock this Answer For Free Now!

View this answer and more for free by performing one of the following actions

qr-code

Scan the QR code to install the App and get 2 free unlocks

upload documents

Unlock quizzes for free by uploading documents