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Figure 163 0.18μm0.18-\mu \mathrm{m} Technology Having Vt=0.4 V\left|V_{t}\right|=0.4 \mathrm{~V} kn=0.4 mA/V2k_{n}^{\prime}=0.4 \mathrm{~mA} / \mathrm{V}^{2}

Question 8

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     Figure 16.3.1 The CMOS inverter shown in Fig. 16.3.1 is fabricated in a  0.18-\mu \mathrm{m}  technology having  \left|V_{t}\right|=0.4 \mathrm{~V} ,  k_{n}^{\prime}=0.4 \mathrm{~mA} / \mathrm{V}^{2} , and  \mu_{p}=\frac{1}{3} \mu_{n} . (a) Find  W_{p}  to obtain matched transistors. (b) For  v_{I}=1.8 \mathrm{~V} , find the maximum load current that the inverter can sink while  v_{O}  is not exceeding  0.1 \mathrm{~V} .

Figure 16.3.1
The CMOS inverter shown in Fig. 16.3.1 is fabricated in a 0.18μm0.18-\mu \mathrm{m} technology having Vt=0.4 V\left|V_{t}\right|=0.4 \mathrm{~V} , kn=0.4 mA/V2k_{n}^{\prime}=0.4 \mathrm{~mA} / \mathrm{V}^{2} , and μp=13μn\mu_{p}=\frac{1}{3} \mu_{n} .
(a) Find WpW_{p} to obtain matched transistors.
(b) For vI=1.8 Vv_{I}=1.8 \mathrm{~V} , find the maximum load current that the inverter can sink while vOv_{O} is not exceeding 0.1 V0.1 \mathrm{~V} .

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(a) For matching,
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