Figure 7.1.1
The NMOS transistor in the circuit in Fig. 7.1.1 has $\mu_{n} C_{o x}=0.4 \mathrm{~mA} / \mathrm{V}^{2}, W / L=25$, and $V_{t}=$ $0.4 \mathrm{~V}$
(a) Find the value of $V_{G S}$ that results in saturationmode operation with a dc current of $0.1 \mathrm{~mA}$. Neglect the Early effect.
(b) Find the value of $R_{D}$ that results in a dc drain voltage of $0.5 \mathrm{~V}$.
(c) Find $g_{m}$ and $r_{O}$ at the dc operating point specified above. Assume $V_{A}=5 \mathrm{~V}$.
(d) Find the open-circuit voltage gain $A_{v o}$.
(e) If a sinusoidal signal with peak amplitude $V_{i}$ is superimposed on the dc voltage $V_{G S}$, find the maximum allowable value of $V_{i}$ for which the transistor operates in saturation.

Question

Quizplus · Accepted Answer

The Answer is (a)
$(a) Figure 7.1.1 \begin{aligned} I_{D} & =\frac{1}{2}\left(\mu_{n} C_{O x} ight)(W / L)\left(V_{G S}-V_{t} ight)^{2} \ 0.1 & =\frac{1}{2} imes 0.4 imes 25\left(V_{G S}-0.4 ight)^{2} \ \Rightarrow V_{G S} & =0.541 \mathrm{~V} \end{aligned} (b) R_{D}=\frac{1.5-V_{D}}{I_{D}}=\frac{1.5-0.5}{0.1}=10 \mathrm{k} \Omega (c) g_{m}=\frac{2 I_{D}}{V_{O V}} where \begin{aligned} V_{O V} & =V_{G S}-V_{t}=0.541-0.4=0.141 \mathrm{~V} \ g_{m} & =\frac{2 imes 0.1}{0.141}=1.42 \mathrm{~mA} / \mathrm{V} \ r_{o} & =\frac{V_{A}}{I_{D}}=\frac{5}{0.1}=50 \mathrm{k} \Omega \end{aligned} (d) \begin{aligned} A_{v o} & =-g_{m}\left(R_{D} \| r_{o} ight) \ & =-1.42(10 \| 50) \ & =-11.8 \mathrm{~V} / \mathrm{V} \end{aligned} (e) At the edge of saturation, v_{G \max }-v_{D \min }=V_{t} Here, \begin{aligned} v_{G \max } & =V_{G S}+\hat{V}_{i}=0.541+\hat{V}_{i} \ v_{D \min } & =V_{D}-\left|A_{v o} ight| \hat{V}_{i} \ & =0.5-11.8 \hat{V}_{i} \end{aligned} Thus, \begin{gathered} 0.541 +\hat{V}_{i}-0.5+11.8 \hat{V}_{i}=0.4 \ \Rightarrow \hat{V}_{i}=28 \mathrm{mV} \end{gathered}$

Figure 7.1.1

\begin{aligned}I_{D} & =\frac{1}{2}\left(\mu_{n} C_{O x} ight)(W / L)\left(V_{G S}-V_{t} ight)^{2} \0.1 & =\frac{1}{2} imes 0.4 imes 25\left(V_{G S}-0.4 ight)^{2} \\Rightarrow V_{G S} & =0.541 \mathrm{~V}\end{aligned}

(b)

R_{D}=\frac{1.5-V_{D}}{I_{D}}=\frac{1.5-0.5}{0.1}=10 \mathrm{k} \Omega

(c)

g_{m}=\frac{2 I_{D}}{V_{O V}}

where

\begin{aligned}V_{O V} & =V_{G S}-V_{t}=0.541-0.4=0.141 \mathrm{~V} \g_{m} & =\frac{2 imes 0.1}{0.141}=1.42 \mathrm{~mA} / \mathrm{V} \r_{o} & =\frac{V_{A}}{I_{D}}=\frac{5}{0.1}=50 \mathrm{k} \Omega\end{aligned}

(d)

\begin{aligned}A_{v o} & =-g_{m}\left(R_{D} \| r_{o} ight) \& =-1.42(10 \| 50) \& =-11.8 \mathrm{~V} / \mathrm{V}\end{aligned}

(e) At the edge of saturation,

v_{G \max }-v_{D \min }=V_{t}

Here,

\begin{aligned}v_{G \max } & =V_{G S}+\hat{V}_{i}=0.541+\hat{V}_{i} \v_{D \min } & =V_{D}-\left|A_{v o} ight| \hat{V}_{i} \& =0.5-11.8 \hat{V}_{i}\end{aligned}

Thus,

\begin{gathered}0.541+\hat{V}_{i}-0.5+11.8 \hat{V}_{i}=0.4 \\Rightarrow \hat{V}_{i}=28 \mathrm{mV}\end{gathered}

Figure 711 the NMOS Transistor in the Circuit in Fig μnCox=0.4 mA/V2,W/L=25\mu_{n} C_{o x}=0.4 \mathrm{~mA} / \mathrm{V}^{2}, W / L=25μn​Cox​=0.4 mA/V2,W/L=25

Figure 711
the NMOS Transistor in the Circuit in Fig $\mu_{n} C_{o x}=0.4 \mathrm{~mA} / \mathrm{V}^{2}, W / L=25$